Progressive Rapide Examples

Index

Written by: Holly Hildreth
Date: September 16, 1996
Updated by: Frank Belz
Date: September 30, 1996

This set of example programs and accompanying discussions is the result of the work of Michael Chen, a Stanford undergraduate (Junior) and a TRW summer hire in the summer of 1996. Michael did this work under the guidance of Frank Belz (at the very beginning) and Holly Hildreth (for most of the summer). Through the course of the summer, Michael was exposed to Rapide for the first time, and was asked to construct a Rapide architecture model for a system being developed under the DARPA CAETI program by Dan Suthers of Pitt:

Advanced Cognitive Tools for Learning (aka AdvLearn or AdvLrn)
Learning Research and Development Center (LRDC)
University of Pittsburgh
Contact: Dan Suthers

The result of Michael's work was in fact a series of such Rapide models, described in Parts 1 through 10 of this document. Each part constitutes an increasingly refined version of the Rapide system architecture model for AdvLearn. The versions, therefore, exhibit a certain coherency despite the fact that the use of Rapide in each version is quite different, and the models are not necessarily consistent with each other. The AdvLearn architecture was derived from telephone conversations between TRW and Dr. Suthers, and from information contained in the following document, and subsequent updates:

[Suthers 96] "Advanced Cognitive Tools for Learning: Requirements and Design Specifications," Edited by Dan Suthers, U. of Pitt., May 7 1996.

The models described here are based on a hypothesis, described in [LVB 96] that it would be useful to provide a series of layered "views" of a system architecture representing different perspectives on the system. Rewrite ends here. This document is a preliminary attempt to define layered architectural views for the AdvLearn capability as it existed in the beginning of the summer, 1996. It refers to the following document, [LVB 96], which describes and rationalizes a layered approach to architectural specification, and suggests a particular layering. One layer in both documents is called the "Abstract Implementation Layer (AIL)"; the first six examples here are to specify the AIL for AdvLearn, in multiple levels of detail, and over at least one significant change in the AIL itself. Later examples add the "User Interface Layer (UIL)" and "Concept of Operations Layer (COL)".

[LVB 96] "Towards an Abstraction Hierarchy for CAETI Architectures, and Possible Applications,"
David Luckham, James Vera, and Frank Belz,
Stanford Univ. and TRW, March 18 1996.

The modeling was performed for the CAETI (Computer-Assisted Education and Training Initiative) Program.

These examples document a progressive approach taken to the modeling of system architectures using Rapide. Very simple, basic Rapide constructs are initially introduced; more complex constructs and techniques are introduced later as the model is refined.

Note also that understanding these examples probably requires that the reader has access to Rapide Language Reference Manuals (LRMs) and to Rapide Tool man pages (e.g., for "rpdc", "pov", and "raptor"). See, for example, the Stanford Rapide Language web page. Unfortunately, the version of Rapide used for these examples was slightly earlier than that described in these LRMs. In the next few weeks, we expect that this will be corrected: we plan to migrate the examples to the LRM version of Rapide when the Rapide tools are able to handle that version.

[ Link to Stanford Rapide Project | Link to Frank's Home Page ]